Author: David Z. Pan    
Paper Titile Authors Year
S3DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity Mingjie Liu, Wuxi Li, Keren Zhu, Biying Xu, Yibo Lin, Linxiao Shen, Xiyuan Tang, Nan Sun, David Z. Pan 2020
High-Definition Routing Congestion Prediction for Large-Scale FPGAs Mohamed Baker Alawieh, Wuxi Li, Yibo Lin, Love Singhal, Mahesh Iyer, David Z. Pan  2020
Towards Area-Efficient Optical Neural Networks: An FFT-based Architecture Jiaqi Gu, Zheng Zhao, Chenghao Feng, Mingjie Liu, Ray T. Chen, David Z. Pan 2020
S2-PM: semi-supervised learning for efficient performance modeling of analog and mixed signal circuits Mohamed Baker Alawieh, Xiyuan Tang, David Z. Pan 2019
Semi-supervised hotspot detection with self-paced multi-task learning Ying Chen, Yibo Lin, Tianyang Gai, Yajuan Su, Yayi Wei, David Z. Pan 2019
A shape-driven spreading algorithm using linear programming for global placement Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan 2019
Tackling signal electromigration with learning-based detection and multistage mitigation Wei Ye, Mohamed Baker Alawieh, Yibo Lin, David Z. Pan 2019
LithoROC: lithography hotspot detection with explicit ROC optimization Wei Ye, Yibo Lin, Meng Li, Qiang Liu, David Z. Pan 2019
Hardware-software co-design of slimmed optical neural networks Zheng Zhao, Derong Liu, Meng Li, Zhoufeng Ying, Lu Zhang, Biying Xu, Bei Yu, Ray T. Chen, David Z. Pan 2019
Layout-dependent aging mitigation for critical path timing Che-Lun Hsu, Shaofeng Guo, Yibo Lin, Xiaoqing Xu, Meng Li, Runsheng Wang, Ru Huang, David Z. Pan 2018
A practical split manufacturing framework for Trojan prevention via simultaneous wire lifting and cell insertion Meng Li, Bei Yu, Yibo Lin, Xiaoqing Xu, Wuxi Li, David Z. Pan 2018
Logic synthesis for energy-efficient photonic integrated circuits Zheng Zhao, Zheng Wang, Zhoufeng Ying, Shounak Dhar, Ray T. Chen, David Z. Pan 2018
Stitch aware detailed placement for multiple e-beam lithography Yibo Lin, Bei Yu, Yi Zou, Zhuo Li, Charles J. Alpert, David Z. Pan 2016
Laplacian eigenmaps and bayesian clustering based layout pattern sampling and its applications to hotspot detection and OPC Tetsuaki Matsunawa, Bei Yu, David Z. Pan 2016
Electromigration-aware redundant via insertion Jiwoo Pak, Bei Yu, David Z. Pan 2015
Polynomial time algorithm for area and power efficient adder synthesis in high-performance designs Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan 2015
Machine learning and pattern matching in physical design Bei Yu, David Z. Pan, Tetsuaki Matsunawa, Xuan Zeng 2015
Self-aligned double patterning layout decomposition with complementary e-beam lithography Jhih-Rong Gao, Bei Yu, David Z. Pan 2014
BOB-router: A new buffering-aware global router with over-the-block routing resources optimization Yilin Zhang, Salim Chowdhury, David Z. Pan 2014
L-shape based layout fracturing for e-beam lithography Bei Yu, Jhih-Rong Gao, David Z. Pan 2013
EPIC: Efficient prediction of IC manufacturing hotspots with a unified meta-classification formulation Duo Ding, Bei Yu, Joydeep Ghosh, David Z. Pan 2012
GLOW: A global router for low-power thermal-reliable interconnect synthesis using photonic wavelength multiplexing Duo Ding, Bei Yu, David Z. Pan 2012
Design for manufacturability and reliability for TSV-based 3D ICs David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Moongon Jung, Joydeep Mitra, Jiwoo Pak, Mohit Pathak, Jae-Seok Yang 2012
Robust and resilient designs from the bottom-up: Technology, CAD, circuit, and system issues Vijay Janapa Reddi, David Z. Pan, Sani R. Nassif, Keith A. Bowman 2012
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Thomas Ernst, Olivier Faynot, David Z. Pan, Giovanni De Micheli 2011
Controlling NBTI degradation during static burn-in testing Ashutosh Chakraborty, David Z. Pan 2011
High performance lithographic hotspot detection using hierarchically refined machine learning Duo Ding, Andres J. Torres, Fedor G. Pikus, David Z. Pan 2011
Exploration of VLSI CAD researches for early design rule evaluation Chul-Hong Park, David Z. Pan, Kevin Lucas 2011
Robust Clock Tree Synthesis with timing yield optimization for 3D-ICs Jae-Seok Yang, Jiwoo Pak, Xin Zhao, Sung Kyu Lim, David Z. Pan 2011
A3MAP: architecture-aware analytic mapping for networks-on-chip Wooyoung Jang, David Z. Pan 2010
A new graph-theoretic, multi-objective layout decomposition framework for double patterning lithography Jae-Seok Yang, Katrina Lu, Minsik Cho, Kun Yuan, David Z. Pan 2010
Total power optimization combining placement, sizing and multi-Vt through slack distribution management Tao Luo, David Newmark, David Z. Pan 2008
DPlace2.0: A stable and efficient analytical placement based on diffusion Tao Luo, David Z. Pan 2008
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond David Z. Pan, Minsik Cho 2008
MeshWorks: An efficient framework for planning, synthesis and optimization of clock mesh networks Anand Rajaram, David Z. Pan 2008
Hippocrates: First-Do-No-Harm Detailed Placement Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia 2007
Fast substrate noise-aware floorplanning with preference directed graph for mixed-signal SOCs Minsik Cho, Hongjoong Shin, David Z. Pan 2006
Robust analytical gate delay modeling for low voltage circuits Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan 2006
Wire sizing with scattering effect for nanoscale interconnection Sean X. Shi, David Z. Pan 2006
Sleep transistor sizing using timing criticality and temporal currents Anand Ramalingam, Bin Zhang, Anirudh Devgan, David Z. Pan 2005
Redundant-via enhanced maze routing for yield improvement Gang Xu, Li-Da Huang, David Z. Pan, Martin D. F. Wong 2005
CMP aware shuttle mask floorplanning Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wong 2005
Improved crosstalk modeling for noise constrained interconnect optimization Jason Cong, David Zhigang Pan, Prasanna V. Srinivas 2001
Interconnect Delay Estimation Models for Synthesis and Design Planning Jason Cong, David Zhigang Pan 1999