Author: Yuan Xie    
Paper Titile Authors Year
Learning the sparsity for ReRAM: mapping and pruning sparse neural network for ReRAM based accelerator Jilan Lin, Zhenhua Zhu, Yu Wang, Yuan Xie 2019
Computation-oriented fault-tolerance schemes for RRAM computing systems Wenqin Huangfu, Lixue Xia, Ming Cheng, Xiling Yin, Tianqi Tang, Boxun Li, Krishnendu Chakrabarty, Yuan Xie, Yu Wang, Huazhong Yang 2017
Building energy-efficient multi-level cell STT-RAM caches with data compression Liu Liu, Ping Chi, Shuangchen Li, Yuanqing Cheng, Yuan Xie 2017
Spendthrift: Machine learning based resource and frequency scaling for ambient energy harvesting nonvolatile processors Kaisheng Ma, Xueqing Li, Srivatsa Rangachar Srinivasa, Yongpan Liu, John Sampson, Yuan Xie, Vijaykrishnan Narayanan 2017
Architecture design with STT-RAM: Opportunities and challenges Ping Chi, Shuangchen Li, Yuanqing Cheng, Yu Lu, Seung H. Kang, Yuan Xie 2016
Nonvolatile memory allocation and hierarchy optimization for high-level synthesis Shuangchen Li, Ang Li, Yongpan Liu, Yuan Xie, Huazhong Yang 2015
Modeling framework for cross-point resistive memory design emphasizing reliability and variability issues Yang Zheng, Cong Xu, Yuan Xie 2015
Heterogeneous architecture design with emerging 3D and non-volatile memory technologies Qiaosha Zou, Matthew Poremba, Rui He, Wei Yang, Junfeng Zhao, Yuan Xie 2015
SwimmingLane: A composite approach to mitigate voltage droop effects in 3D power delivery network Xing Hu, Yi Xu, Yu Hu, Yuan Xie 2014
Modeling and design analysis of 3D vertical resistive memory - A low cost cross-point architecture Cong Xu, Dimin Niu, Shimeng Yu, Yuan Xie 2014
NoΔ: Leveraging delta compression for end-to-end memory access in NoC based multicores Jia Zhan, Matthew Poremba, Yi Xu, Yuan Xie 2014
3DLAT: TSV-based 3D ICs crosstalk minimization utilizing Less Adjacent Transition code Qiaosha Zou, Dimin Niu, Yan Cao, Yuan Xie 2014
Thermal-aware power network design for IR drop reduction in 3D ICs Zuowei Li, Yuchun Ma, Qiang Zhou, Yici Cai, Yu Wang, Tingting Huang, Yuan Xie 2012
Low power memristor-based ReRAM design with Error Correcting Code Dimin Niu, Yang Xiao, Yuan Xie 2012
Yield-aware time-efficient testing and self-fixing design for TSV-based 3D ICs Jing Xie, Yu Wang, Yuan Xie 2012
AdaMS: Adaptive MLC/SLC phase-change memory design for file storage Xiangyu Dong, Yuan Xie 2011
On-chip hybrid power supply system for wireless sensor nodes Wulong Liu, Yu Wang, Wei Liu, Yuchun Ma, Yuan Xie, Huazhong Yang 2011
Enabling quality-of-service in nanophotonic network-on-chip Jin Ouyang, Yuan Xie 2011
A frequent-value based PRAM memory architecture Guangyu Sun, Dimin Niu, Jin Ouyang, Yuan Xie 2011
Minimizing leakage power in aging-bounded high-level synthesis with design time multi-Vth assignment Yibo Chen, Yuan Xie, Yu Wang, Andrés Takach 2010
Parametric yield driven resource binding in behavioral synthesis with multi-Vth/Vdd library Yibo Chen, Yuan Xie, Yu Wang, Andrés Takach 2010
Three-dimensional integrated circuits (3D IC) floorplan and power/ground network co-synthesis Paul Falkenstern, Yuan Xie, Yao-Wen Chang, Yu Wang 2010
Energy and performance driven circuit design for emerging phase-change memory Dimin Niu, Yibo Chen, Xiangyu Dong, Yuan Xie 2010
Tolerating process variations in high-level synthesis using transparent latches Yibo Chen, Yuan Xie 2009
A framework for estimating NBTI degradation of microarchitectural components Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan 2009
System-level cost analysis and design exploration for three-dimensional integrated circuits (3D ICs) Xiangyu Dong, Yuan Xie 2009
A criticality-driven microarchitectural three dimensional (3D) floorplanner Srinath Sridharan, Michael DeBole, Guangyu Sun, Yuan Xie, Vijaykrishnan Narayanan 2009
Variation-aware resource sharing and binding in behavioral synthesis Feng Wang, Yuan Xie, Andrés Takach 2009
Variability-driven module selection with joint design time optimization and post-silicon tuning Feng Wang, Xiaoxia Wu, Yuan Xie 2008
Optimal topology exploration for application-specific 3D architectures Ozcan Ozturk, Feng Wang, Mahmut T. Kandemir, Yuan Xie 2006
FD-HGAC: a hybrid heuristic/genetic algorithm hardware/software co-synthesis framework with fault detection John Conner, Yuan Xie, Mahmut T. Kandemir, Robert P. Dick, Greg M. Link 2005
Designing reliable circuit in the presence of soft errors Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin 2005
Low-leakage robust SRAM cell design for sub-100nm technologies Shengqi Yang, Wayne H. Wolf, Wenping Wang, Narayanan Vijaykrishnan, Yuan Xie 2005
Co-synthesis with custom ASICs Yuan Xie, Wayne H. Wolf 2000