Author: Kenichi Okada    
Paper Title Authors Year
A 28GHz CMOS Differential Bi-Directional Amplifier for 5G NR Zheng Li, Jian Pang, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Joshua Alvin, Bangan Liu, Zheng Sun, Hongye Huang, Atsushi Shirane, Kenichi Okada 2020
W-band ultra-high data-rate 65nm CMOS wireless transceiver Korkut Kaan Tokgoz, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Yoichi Kawano, Toshihide Suzuki, Taisuke Iwai, Kenichi Okada, Akira Matsuzawa 2017
An HDL-synthesized injection-locked PLL using LC-based DCO for on-chip clock generation Dongsheng Yang, Wei Deng, Bangan Liu, Aravind Tharayil Narayanan, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa 2017
A noise reduction technique for divider-less fractional-N frequency synthesizer using phase-interpolation technique Aravind Tharayil Narayanan, Makihiko Katsuragi, Kengo Nakata, Yuki Terashima, Kenichi Okada, Akira Matsuzawa 2016
An automatic place-and-routed two-stage fractional-N injection-locked PLL using soft injection Dongsheng Yang, Wei Deng, Aravind Tharayil Narayanan, Kengo Nakata, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa 2016
A tail-current modulated VCO with adaptive-bias scheme Aravind Tharayil Narayanan, Wei Deng, Kenichi Okada, Akira Matsuzawa 2015
A 58.3-to-65.4 GHz 34.2 mW sub-harmonically injection-locked PLL with a sub-sampling phase detection Teerachot Siriburanon, Tomohiro Ueno, Kento Kimura, Satoshi Kondo, Wei Deng, Kenichi Okada, Akira Matsuzawa 2015
An HDL-synthesized gated-edge-injection PLL with a current output DAC Dongsheng Yang, Wei Deng, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa 2015
A dual-loop injection-locked PLL with all-digital background calibration system for on-chip clock generation Wei Deng, Ahmed Musa, Teerachot Siriburanon, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa 2014
A swing-enhanced current-reuse class-C VCO with dynamic bias control circuits Teerachot Siriburanon, Wei Deng, Kenichi Okada, Akira Matsuzawa 2014
A fractional-N harmonic injection-locked frequency synthesizer with 10MHz-6.6GHz quadrature outputs for software-defined radios Wei Deng, Ahmed Musa, Kenichi Okada, Akira Matsuzawa 2013
A full 4-channel 60 GHz direct-conversion transceiver Seitaro Kawai, Ryo Minami, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Yuuki Tsukui, Kenichi Okada, Akira Matsuzawa 2013
A sub-harmonic injection-locked frequency synthesizer with frequency calibration scheme for use in 60GHz TDD transceivers Teerachot Siriburanon, Wei Deng, Ahmed Musa, Kenichi Okada, Akira Matsuzawa 2013
A PVT-robust feedback class-C VCO using an oscillation swing enhancement technique Wei Deng, Kenichi Okada, Akira Matsuzawa 2012
A 60-GHz 16QAM 11Gbps direct-conversion transceiver in 65nm CMOS Ryo Minami, Hiroki Asada, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Win Chaivipas, Kenichi Okada, Akira Matsuzawa 2012
A Progressive Mixing 20GHz ILFD with wide locking range for higher division ratios Ahmed Musa, Kenichi Okada, Akira Matsuzawa 2012
An ultra-low-voltage LC-VCO with a frequency extension circuit for future 0.5-V clock generation Wei Deng, Kenichi Okada, Akira Matsuzawa 2011
A 58-63.6GHz quadrature PLL frequency synthesizer using dual-injection technique Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chaivipas, Kenichi Okada, Akira Matsuzawa 2011
A 2-6 GHz fully integrated tunable CMOS power amplifier for multi-standard transmitters Daisuke Imanishi, Jee Young Hong, Kenichi Okada, Akira Matsuzawa 2010
A 60GHz direct-conversion transmitter in 65nm CMOS technology Naoki Takayama, Kota Matsushita, Shogo Ito, Ning Li, Kenichi Okada, Akira Matsuzawa 2010
LVDS-type on-chip transmision line interconnect with passive equalizers in 90nm CMOS process Akiko Mineyama, Hiroyuki Ito, Takahiro Ishii, Kenichi Okada, Kazuya Masu 2008
A CMOS direct sampling mixer using Switched Capacitor Filter technique for software-defined radio Hong Phuc Ninh, Takashi Moue, Takashi Kurashina, Kenichi Okada, Akira Matsuzawa 2008
Small-area CMOS RF distributed mixer using multi-port inductors Susumu Sadoshima, Satoshi Fukuda, Tackya Yammouch, Hiroyuki Ito, Kenichi Okada, Kazuya Masu 2008
Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation Satoshi Fukuda, D. Kawazoe, Kenichi Okada, Kazuya Masu 2007
A Wideband CMOS LC-VCO Using Variable Inductor Kazuma Ohashi, Yusaku Ito, Yoshiaki Yoshihara, Kenichi Okada, Kazuya Masu 2007
A Multi-Drop Transmission-Line Interconnect in Si LSI Junki Seita, Hiroyuki Ito, Kenichi Okada, Takashi Sato, Kazuya Masu 2007
Evaluation of on-chip transmission line interconnect using wire length distribution Junpei Inoue, Hiroyuki Ito, Shinichiro Gomi, Takanori Kyogoku, Takumi Uezono, Kenichi Okada, Kazuya Masu 2005
A dynamic reconfigurable RF circuit architecture Kenichi Okada, Yoshiaki Yoshihara, Hirotaka Sugawara, Kazuya Masu 2005
A statistical gate delay model for intra-chip and inter-chip variabilities Kenichi Okada, Kento Yamaoka, Hidetoshi Onodera 2003
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