Author: Xiaowei Li    
Paper Title Authors Year
Search-free Accelerator for Sparse Convolutional Neural Networks Bosheng Liu, Xiaoming Chen, Yinhe Han, Ying Wang, Jiajun Li, Haobo Xu, Xiaowei Li 2020
Simulate-the-hardware: training accurate binarized neural networks for low-precision neural accelerators Jiajun Li, Ying Wang, Bosheng Liu, Yinhe Han, Xiaowei Li 2019
P3M: a PIM-based neural network model protection scheme for deep learning accelerator Wen Li, Ying Wang, Huawei Li, Xiaowei Li 2019
TNPU: an efficient accelerator architecture for training convolutional neural networks Jiajun Li, Guihai Yan, Wenyan Lu, Shuhao Jiang, Shijun Gong, Jingya Wu, Junchao Yan, Xiaowei Li 2019
Redeeming chip-level power efficiency by collaborative management of the computation and communication Ning Lin, Hang Lu, Xin Wei, Xiaowei Li 2019
Addressing the issue of processing element under-utilization in general-purpose systolic deep learning accelerators Bosheng Liu, Xiaoming Chen, Ying Wang, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li 2019
CuckooPIM: an efficient and less-blocking coherence mechanism for processing-in-memory systems. Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xiaowei Li 2019
PIMCH: Cooperative memory prefetching in processing-in-memory architecture Sheng Xu, Ying Wang, Yinhe Han, Xiaowei Li 2018
XORiM: A case of in-memory bit-comparator implementation and its performance implications Kaiwei Zou, Ying Wang, Huawei Li, Xiaowei Li 2018
ApproxEye: Enabling approximate computation reuse for microrobotic computer vision Xin He, Guihai Yan, Faqiang Sun, Yinhe Han, Xiaowei Li 2017
BoDNoC: Providing bandwidth-on-demand interconnection for multi-granularity memory systems Shiqi Lian, Ying Wang, Yinhe Han, Xiaowei Li 2017
ApproxPIM: Exploiting realistic 3D-stacked DRAM for energy-efficient processing in-memory Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li 2017
CNN-based object detection solutions for embedded heterogeneous multicore SoCs Cheng Wang, Ying Wang, Yinhe Han, Lili Song, Zhenyu Quan, Jiajun Li, Xiaowei Li 2017
ACR: Enabling computation reuse for approximate computing Xin He, Guihai Yan, Yinhe Han, Xiaowei Li 2016
ShuttleNoC: Boosting on-chip communication efficiency by enabling localized power adaptation Hang Lu, Guihai Yan, Yinhe Han, Ying Wang, Xiaowei Li 2015
Amphisbaena: Modeling two orthogonal ways to hunt on heterogeneous many-cores Jun Ma, Guihai Yan, Yinhe Han, Xiaowei Li 2014
Hungarian algorithm based virtualization to maintain application timing similarity for defect-tolerant NoC Ke Yue, Frank Lockom, Zheng Li, Soumia Ghalim, Shangping Ren, Lei Zhang, Xiaowei Li 2012
Vertical interconnects squeezing in symmetric 3D mesh Network-on-Chip Cheng Liu, Lei Zhang, Yinhe Han, Xiaowei Li 2011
A resilient on-chip router design through data path salvaging Cheng Liu, Lei Zhang, Yinhe Han, Xiaowei Li 2011
Graph partition based path selection for testing of small delay defects Zijian He, Tao Lv, Huawei Li, Xiaowei Li 2010
Robust test generation for power supply noise induced path delay faults Xiang Fu, Huawei Li, Yu Hu, Xiaowei Li 2008
On reducing both shift and capture power for scan-based testing Jia Li, Qiang Xu, Yu Hu, Xiaowei Li 2008
A design- for-diagnosis technique for diagnosing both scan chain faults and combinational circuit faults Fei Wang, Yu Hu, Huawei Li, Xiaowei Li 2008
Design of an efficient memory subsystem for network processor Shuguang Gong, Huawei Li, Yufeng Xu, Tong Liu, Xiaowei Li 2005
Theoretic analysis and enhanced X-tolerance of test response compact based on convolutional code Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li 2005
Vector extraction for average total power estimation Yongjun Xu, Jinghua Chen, Zuying Luo, Xiaowei Li 2005
Data Path Synthesis for BIST with Low Area Overhead Xiaowei Li, Paul Y. S. Cheung 1999
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