Author: Hai Helen Li    
Paper Titile Authors Year
Parallelism in Deep Learning Accelerators Linghao Song, Fan Chen, Yiran Chen, Hai (Helen) Li 2020
PARC: A Processing-in-CAM Architecture for Genomic Long Read Pairwise Alignment using ReRAM Fan Chen, Linghao Song, Hai Li, Yiran Chen 2020
Enhancing Generalization of Wafer Defect Detection by Data Discrepancy-aware Preprocessing and Contrast-varied Augmentation Chaofei Yang, Jiang Hu, Hai Li, Yiran Chen 2020
AdverQuil: an efficient adversarial detection and alleviation technique for black-box neuromorphic computing systems Hsin-Pai Cheng, Juncheng Shen, Huanrui Yang, Qing Wu, Hai Li, Yiran Chen 2019
Build reliable and efficient neuromorphic design with memristor technology Bing Li, Bonan Yan, Chenchen Liu, Hai (Helen) Li 2019
NeuralHMC: an efficient HMC-based accelerator for deep neural networks Chuhan Min, Jiachen Mao, Hai Li, Yiran Chen 2019
Process variation aware data management for magnetic skyrmions racetrack memory Fan Chen, Zheng Li, Wang Kang, Weisheng Zhao, Hai Li, Yiran Chen 2018
Modeling of biaxial magnetic tunneling junction for multi-level cell STT-RAM realization Enes Eken, Ismail Bayram, Hai Helen Li, Yiran Chen 2018
Spintronics based stochastic computing for efficient Bayesian inference system Xiaotao Jia, Jianlei Yang, Zhaohao Wang, Yiran Chen, Hai Helen Li, Weisheng Zhao 2018
Running sparse and low-precision neural network: When algorithm meets hardware Bing Li, Wei Wen, Jiachen Mao, Sicheng Li, Yiran Chen, Hai Helen Li 2018
Neu-NoC: A high-efficient interconnection network for accelerated neuromorphic systems Xiaoxiao Liu, Wei Wen, Xuehai Qian, Hai Li, Yiran Chen 2018
A memristor-based neuromorphic engine with a current sensing scheme for artificial neural network applications Chenchen Liu, Qing Yang, Chi Zhang, Hao Jiang, Qing Wu, Hai Helen Li 2017
Extending the lifetime of object-based NAND flash device with STT-RAM/DRAM hybrid buffer Chuhan Min, Jie Guo, Hai Li, Yiran Chen 2017
Classification accuracy improvement for neuromorphic computing systems with one-level precision synapses Yandan Wang, Wei Wen, Linghao Song, Hai Helen Li 2017
A novel PUF based on cell error rate distribution of STT-RAM Xian Zhang, Guangyu Sun, Yaojun Zhang, Yiran Chen, Hai Li, Wujie Wen, Jia Di 2016
An efficient STT-RAM-based register file in GPU architectures Xiaoxiao Liu, Mengjie Mao, Xiuyuan Bi, Hai Li, Yiran Chen 2015
Quantitative modeling of racetrack memory, a tradeoff among area, performance, and power Chao Zhang, Guangyu Sun, Weiqi Zhang, Fan Mi, Hai Li, Weisheng Zhao 2015
The stochastic modeling of TiO2 memristor and its usage in neuromorphic system design Miao Hu, Yu Wang, Qinru Qiu, Yiran Chen, Hai Li 2014
A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores Jianxing Wang, Yenni Tim, Weng-Fai Wong, Zhong-Liang Ong, Zhenyu Sun, Hai Li 2014
Fine-grained dynamic voltage scaling on OLED display Xiang Chen, Jian Zheng, Yiran Chen, Wei Zhang, Hai Li 2012
A Look Up Table design with 3D bipolar RRAMs Yi-Chung Chen, Wei Zhang, Hai Li 2012
Emerging sensing techniques for emerging memories Yiran Chen, Hai Li 2011
Geometry variations analysis of TiO2 thin-film and spintronic memristors Miao Hu, Hai Li, Yiran Chen, Xiaobin Wang, Robinson E. Pino 2011
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SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar processor design
Hai Li, Yiran Chen, Kaushik Roy, Cheng-Kok Koh 2006