Author: Cheng-Kok Koh    
Paper Titile Authors Year
Clustering of flip-flops for useful-skew clock tree synthesis Chuan Yean Tan, Rickard Ewetz, Cheng-Kok Koh 2018
Delay-driven layer assignment for advanced technology nodes Szu-Yuan Han, Wen-Hao Liu, Rickard Ewetz, Cheng-Kok Koh, Kai-Yuan Chao, Ting-Chi Wang 2017
MCMM clock tree optimization based on slack redistribution using a reduced slack graph Rickard Ewetz, Cheng-Kok Koh 2016
Fast clock skew scheduling based on sparse-graph algorithms Rickard Ewetz, Shankarshana Janarthanan, Cheng-Kok Koh 2015
Analytical placement of mixed-size circuits for better detailed-routability Shuai Li, Cheng-Kok Koh 2014
Simultaneous redundant via insertion and line end extension for yield optimization Shing-Tung Lin, Kuang-Yao Lee, Ting-Chi Wang, Cheng-Kok Koh, Kai-Yuan Chao 2011
SASIMI: sparsity-aware simulation of interconnect-dominated circuits with non-linear devices Jitesh Jain, Stephen Cauley, Cheng-Kok Koh, Venkataramanan Balakrishnan 2006
SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar processor design Hai Li, Yiran Chen, Kaushik Roy, Cheng-Kok Koh 2006
Adaptive admittance-based conductor meshing for interconnect analysis Ya-Chi Yang, Cheng-Kok Koh, Venkataramanan Balakrishnan 2006
Post-layout logic duplication for synthesis of domino circuits with complex gates Aiqun Cao, Ruibing Lu, Cheng-Kok Koh 2005
Process variation robust clock tree routing Wai-Ching Douglas Lam, Cheng-Kok Koh 2005
Compact and stable modeling of partial inductance and reluctance matrices Hong Li, Venkataramanan Balakrishnan, Cheng-Kok Koh, Guoan Zhong 2005
Floorplan management: incremental placement for gate sizing and buffer insertion Chen Li, Cheng-Kok Koh, Patrick H. Madden 2005
Improving the scalability of SAMBA bus architecture Ruibing Lu, Aiqun Cao, Cheng-Kok Koh 2005
Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocessor Yiran Chen, Kaushik Roy, Cheng-Kok Koh 2004
A high performance bus communication architecture through bus splitting Ruibing Lu, Cheng-Kok Koh 2004
Integer linear programming-based synthesis of skewed logic circuits Aiqun Cao, Naran Sirisantana, Cheng-Kok Koh, Kaushik Roy 2003
A metric for analyzing effective on-chip inductive coupling Guoan Zhong, Cheng-Kok Koh, Kaushik Roy 2003
Power Supply Noise Aware Floorplanning and Decoupling Capacitance Placement Shiyou Zhao, Kaushik Roy, Cheng-Kok Koh 2002
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Efficient Approximate Balanced Truncation of General Large-Scale RLC Systems via Krylov Methods
Q. Su, Venkataramanan Balakrishnan, Cheng-Kok Koh 2002